1. Field of the Invention
The present invention relates to a plasma display panel. More particularly, the present invention relates to a plasma display panel including discharge cells that are defined by barrier rib members formed on a rear substrate of the plasma display panel, in which the barrier rib members intersect and are parallel to display electrodes formed on a front substrate.
2. Description of the Related Art
A plasma display panel (PDP) is a display device that realizes the display of images by the illumination or excitation of phosphors by plasma discharge. Predetermined voltages are applied to electrodes formed on front and rear substrates of the PDP to realize plasma discharge in discharge cells defined by barrier ribs. Ultraviolet rays generated during discharge excite phosphor layers formed in a predetermined pattern to realize the display of visual images.
The PDP is classified into the two different types of the DC PDP and AC PDP, depending on the drive voltage waveform, that is, the discharge type. PDPs can be classified also as an opposing discharge PDP and a surface discharge PDP, depending on the electrode structure. The surface discharge PDP typically includes a front substrate and a rear substrate. Further, address electrodes are formed in a predetermined pattern on the rear substrate, and a dielectric layer is formed on the address electrodes. Barrier ribs are formed on the dielectric layer. The barrier ribs define discharge cells and prevent electrical and optical crosstalk between the cells. Phosphor layers are formed along at least one wall of each of the barrier ribs.
Display electrodes are formed in a predetermined pattern on a surface of the front substrate opposing the rear substrate. The display electrodes are orthogonal to the address electrodes. Further, the display electrodes are formed of a transparent material, and bus electrodes having a width that is less than a width of the display electrodes are formed on the display electrodes to reduce a line resistance of the same. A dielectric layer is formed covering the display electrodes and bus electrodes.
In the PDP structured as in the above, the barrier ribs define the discharge cells and prevent crosstalk between the discharge cells as described above, and also protect the discharge cells from external pressure applied during sealing of the front and rear substrates. If a height of the barrier ribs is increased, a size of the discharge cells is increased. This increases an area of deposition of the phosphor layers, which, in turn, enhances brightness. However, in the conventional stripe configuration of the barrier ribs (where the barrier ribs are aligned with the address electrodes), an increase in the height of the barrier ribs makes the space between the address electrodes and display electrodes greater. Since this increases an address voltage, there is a limit to how high the barrier ribs can be formed.
The applicant disclosed in U.S. Pat. No. 6,495,958 a plasma display panel that includes conductive wire electrodes such that power consumption is reduced during operation. This plasma display panel will be described with reference to FIG. 1.
As illustrated in the drawing, a PDP 100 includes a front substrate 102 and a rear substrate 104. Formed on a surface of the front substrate 102 opposing the rear substrate 104 are display electrodes 106 that include common electrodes 106a and scan electrodes 106b. A dielectric layer 108 is formed on the front substrate 102 covering the display electrodes 106, and a protection layer 110 such as a magnesium oxide layer is formed covering the dielectric layer 108. The common electrodes 106a and the scan electrodes 106b are formed in an alternating manner.
Barrier ribs 112 are formed in a stripe pattern on a surface of the rear substrate 104 opposing the front substrate 102. Discharge cells are formed between the barrier ribs 112. The barrier ribs 112 prevent crosstalk between the cells during discharge. Further, red, green, and blue phosphor layers 114 that are illuminated by discharge gas are formed in the discharge cells. Address electrodes 116 are formed on the phosphor layers 114 in a state orthogonal to the display electrodes 106 of the front substrate 102. The interaction between the address electrodes 116 and the discharge sustain (or display) electrodes 106 induces plasma discharges and has the phosphor illuminate in the neighborhood of the intersection of the address electrodes 116 and the display electrodes 106. The address electrodes 116 are formed as wires made of a conductive metal material such as aluminum, copper, gold, or white gold. The address electrodes 116 are coated with an insulation 118.
In the PDP 100 structured as described above, since the address electrodes 116 are mounted on the phosphor layers 114, the space between the address electrodes 116 and the display electrodes 106 may be reduced over more conventional PDPs in which the address electrodes are covered by a dielectric layer. Accordingly, the amount of power consumed may be reduced during operation of the PDP in proportion to the reduction in the space between the address electrodes 116 and the display electrodes 106. Also, the barrier ribs 112 may be formed to a greater height such that the discharge cells and the phosphor deposition area are increased to enhance brightness and realize more stable discharge.
However, a drawback of the above configuration is that terminal areas of the wire-type address electrodes 116 that protrude to the outside of the PDP are secured only by a sealant used to seal the substrates 102 and 104. This may result in the terminal areas of the address electrodes 116 from becoming unaligned during the sealing process so that a distance between the terminal areas varies from one terminal to the next.